发明名称 RATE CONVERSION DIGITAL FILTER
摘要 PURPOSE:To reduce the circuit scale and to lower the manufacture cost by connecting plural stages of low magnification rate conversion digital filters in cascade to obtain the desired final magnification. CONSTITUTION:It is supposed that, for example, an A/D converting circuit is arranged on the pre-stage of a quadruple rate conversion digital filter. Delay circuits 11, 12 having a delay of (Ts/2) being a half of the sampling period of the A/D converting circuit are connected in cascade in the double rate conversion digital filter and the input signal, and the signals subjected to delay of Ts/2 and Ts are synthesized by adder circuits 13, 14 and factor circuits 15, 16. In the double rate conversion digital filter 20 of the poststage, delay circuits 21, 22 having a delay of Ts/4 are connected in cascade, and the input signal from the pre-stage and the signals delayed by Ts/4 and Ts/2 are synthesized similarly as above. Thus, a few number of stages are enough for the delay circuits.
申请公布号 JPS61192113(A) 申请公布日期 1986.08.26
申请号 JP19850032260 申请日期 1985.02.20
申请人 NEC HOME ELECTRONICS LTD 发明人 KOBAYASHI REIICHI
分类号 H03H17/00;H03H17/02 主分类号 H03H17/00
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