发明名称 RANDOM ACCESS MEMORY
摘要 PURPOSE:To shorten exceedingly a time required for an address assignment for the purpose of initializing by performing the address assignments for memory cells of a random access memory simultaneously. CONSTITUTION:In the case of a write-cycle for the initializing operation, the address assignment signals which indicate row-line l and column-line m as shown by the signal (1) at A0-A9 are given. When a writing is carried out, a chip selection signal CS shown by the signal (2) is a low level and also a write-signal WE shown by the signal (3) is in a low level. As a result, a gate G1 output level turns out high to make buffers B11-B14 active and buffers B15-B18 inactive. Data are given from input and output terminals I01-I04 and switching cells P0 become conductive. Low level initializing signals S/R are given through switching cells P0 at a line m1 to make a matrix selection possible. Data to be stored through a data input controlling circuit 4 are commonly given from a column/input and output selection circuit 5 to the column line and the common data are stored at store cells assigned as the address.
申请公布号 JPS61192098(A) 申请公布日期 1986.08.26
申请号 JP19850033348 申请日期 1985.02.21
申请人 SHARP CORP 发明人 TAKAOKA MASUYOSHI;SOYAMA TADASHI
分类号 G11C7/00;G11C11/34;G11C11/401;G11C11/41 主分类号 G11C7/00
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