| 摘要 |
The output signal from the CCD output register of a semiconductor imager having a floating-gate or floating-diffusion type of output stage is applied to a differentiation circuit. The response of the differentiator circuit to the introduction of charge under the floating element is synchronously detected at output register clock rate to obtain video samples with low reset noise. This is a single sampling process, which avoids the double sampling required in correlated double sampling to reduce reset noise, and which can provide for horizontal peaking.
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