发明名称 REGULATOR
摘要 PURPOSE:To optimize 'target value following-up' and 'disturbance suppression' simultaneously by providing a regulating means of a target value on the target value input path of a proportional operation means and providing a delay element on the target value input path of an integral operation means. CONSTITUTION:In a regulator 1, the first coefficient part 3, the second coefficient part 5, and a primary delay filter 7 are added to input paths of a target value SV to control elements of proportional, integral, and differential operation parts. The inputted target value SV is multiplied by a coefficient alpha in the first coefficient part 3, and a deviation D1 from a measured value PV from a controlled system 11 is calculated in the first subtracting part 9. The target value is multiplied by a coefficient betain the second coefficient part 5, and a deviation D2 from the measured value PV is operated in the second subtracting part 13 and is differentiated by a differential operation part 15. The target value SV delayed through the primary delay filter 7 passes the third subtracting part 17 and is integrated by an integral operation part 19. These outputs are synthesized by an adding part 21, and the controlled system 11 is controlled by an operation signal MV obtained by allowing the result to pass a proportional part 23, thereby equalizing the measured value PV to the target value SV.
申请公布号 JPS61190602(A) 申请公布日期 1986.08.25
申请号 JP19850029442 申请日期 1985.02.19
申请人 TOSHIBA CORP 发明人 HIROI KAZUO
分类号 G05B13/00;G05B11/42;G05B13/02 主分类号 G05B13/00
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