| 摘要 |
PURPOSE:To facilitate the access by providing registers corresponding to n- number of equally divided areas of a memory and storing a value larger than n-1 in registers corresponding to areas having defective positions and holding values increases successively by one in the other registers. CONSTITUTION:A memory controller 100 connected to a common bus 4 and an address signal line 5 consists of a memory 2, an address comparing circuit 6, and a memory test circuit 7, and the memory 2 is divided equally into n- number of areas, and registers whose number of bits is larger than log2n are provided in the circuit 6 correspondingly to individual areas. When the upper digit of the address common to individual divided areas and stored data of registers coincide with each other, divided areas are connected to the bus 4, and write and read data in individual addresses of the memory 2 are compared with each other by the circuit 7; and if they do not coincide with each other, a value larger than n-1 is held in the register corresponding to the area including the address of disaccord between write and read data, and values increased successively by one are held in the other registers.
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