发明名称 RECORDING HEAD CONTROL CIRCUIT
摘要 PURPOSE:To adjust periodically a recording head and to keep a satisfactory recording condition by providing a time setting latch circuit and a timer counter, which go to be an interruption timer for a recording head adjusting time, at the recording head controller. CONSTITUTION:A time setting latch circuit 16 preserves the time data given through data lines D0-D7 by means of the latch signal of a static controller 2. When a timer counter 17 counts a clock from a terminal ICK, and when the counted clock reaches the value preserved in the circuit 16, the interruption signal is sent through a terminal IRQ to a microprocessor MPU for the control and the counter informs that it reaches the set time. When an MPU receives this, the recording action is stopped and the processing for the recording head adjustment is executed. The data D0-D7 is latched through a bit shifter 1 to recording data latch circuits 8-11. A control register 3 controls a shifter 1, selects the upward downward inversion or non-inversion of the recording data of the circuits 8-11, and selects a simultaneous driving or a time division driving of output control circuits 12-15 through a conduction control circuit 4.
申请公布号 JPS61191163(A) 申请公布日期 1986.08.25
申请号 JP19850030480 申请日期 1985.02.20
申请人 CANON INC 发明人 NAKADA KAZUHIRO
分类号 B41J2/30;B41J2/485;G06K15/10;H04N1/40 主分类号 B41J2/30
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