发明名称 TESTING METHOD FOR INTEGRATING CIRCUIT
摘要 PURPOSE:To measure an IC having a frequency source higher than the operating frequency of a tester automatically by inserting a frequency divider between an integrating circuit to be measured and the tester for the integrating circuit and detecting oscillation frequency from the period of the output of the frequency divider. CONSTITUTION:The frequency divider 4 is inserted between the integrating circuit 1 to be measured and the tester 4 for the integrating circuit 1. In this case, an oscillation signal (a) of the IC is inputted to one input of a NAND gate 5 and an initializing signal (b) for the frequency divider 6a which sent from a tester 4 is inputted to the other input. The frequency divider 6 divides frequency by using an oscillation signal as a clock and a signal is transmitted from the output Q of the frequency divider 6, received by the tester 4 and matched with an expected value to decide the legality of the oscillation frequency. When the frequency divider 6 adopts a binary system, the tester 4 decides the oscillation frequency on the basis of the shown equation, so that an IC having a frequency source higher than the operating frequency of the tester can be automatically measured.
申请公布号 JPS61189472(A) 申请公布日期 1986.08.23
申请号 JP19850029655 申请日期 1985.02.18
申请人 NEC CORP 发明人 OKANO YASUNOBU
分类号 G01R31/28;G01R31/316;G06F11/24 主分类号 G01R31/28
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