发明名称 ERROR COMPENSATION CIRCUIT
摘要 PURPOSE:To minimize the number of N-bit registers to K, by selecting at a selection circuit only the data of K channels which include a channel to be compensated using pre-value maintenance by a channel control signal which specifies channels to be outputted as sound among the nXK channels. CONSTITUTION:A data selection circuit A17 which picks up only data of (i-1)XK channel to iXK channel (i is an integral number among 1<=i<=n) from the data of nXK channels is provided at the front step of a data selection circuit B18. The switch inside the data selection circuit B18 is actuated by a signal 22 which indicates the existence or otherwise of error in the data array. By selecting the data to be inputted to a selection circuit B18 using a selection circuit A17, any recording medium recorded by any kind of recording method can be compensated of its error in the reproduction channel using two N-bit registers.
申请公布号 JPS61188784(A) 申请公布日期 1986.08.22
申请号 JP19850029517 申请日期 1985.02.18
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 IIZUKA HIROYUKI;KAMEDA KEIICHI
分类号 G11B20/18 主分类号 G11B20/18
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