发明名称 MULTILAYER INTERCONNECTION SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To highly integrate a circuit by utilizing recesses of an irregular surface produced in case of forming an insulating layer as new wiring region. CONSTITUTION:Aluminum of the first layer metal wirings 2 is formed on a semiconductor substrate 1, and a CVD-SiO2 film of an insulating film 3 is coated thereon. In this case, the upper portion of the portion between two adjacent first layer metal wirings 2 is recessed as compared with the upper portion coated with the wirings 2. Aluminum of the first and fifth layer metal wirings 4 is coated in the recess, aluminum of the second layer metal wirings 5 is coated on the projection of the upper portion of the wirings 2, and a CVD-SiO2 film of an insulating film 6 is coated thereon. When the first, fifth layer wirings 4 and the first layer wirings 2 or the second layer wirings 5 are separated therebetween only at a distance of the degree that they are electrically interfered, the thickness of the insulating film is increased or the interval of the first and second adjacent wirings is increased.
申请公布号 JPS61188946(A) 申请公布日期 1986.08.22
申请号 JP19850028245 申请日期 1985.02.18
申请人 TOSHIBA CORP 发明人 TANAKA ATSUSHI
分类号 H01L21/768;H01L23/522;(IPC1-7):H01L21/88 主分类号 H01L21/768
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