发明名称 PULSE GENERATING CIRCUIT
摘要 PURPOSE:To generate a pulse corresponding to a fall of a pulse train by providing an input stage circuit for generating the first and the second output signals consisting of the pulse train of the opposite phase to each other, an amplifying circuit for amplifying the first output signal, and an AND gate for taking AND of a signal obtained in an input terminal of the amplifying circuit and the second output signal. CONSTITUTION:The third to the sixth transistors 7 to 11 for constituting the first and the second amplifying circuits 6, 9 are used in a saturated area, and in a state that an excessive carrier is injected to the base. Also, the bases of the third and the fifth transistors 7, 10 are connected to the collectors of the first and the second transistors 4, 6 whose impedance is high, respectively, and also a value of a load resistance 17 and 18 which are connected to the collectors of the first and the second transistors 4, 5, respectively is set so as to be comparatively large. Therefore, a carrier accumulation effect is generated, and a waveform of an output signal is delayed as shown by a dotted line. Accordingly, a pulse as shown in (c) is generated in an output terminal of an AND gate 12.
申请公布号 JPS61189013(A) 申请公布日期 1986.08.22
申请号 JP19850028563 申请日期 1985.02.15
申请人 SANYO ELECTRIC CO LTD;TOKYO SANYO ELECTRIC CO LTD 发明人 MIZUMOTO MASAO;YOSHITOMI TETSUYA
分类号 H03K3/02 主分类号 H03K3/02
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