| 摘要 |
PURPOSE:To save vain processing time of a data processing means to prevent the efficiency from being lowered by alternately writing in two RAMs the data from a large number of channels and reading these stored data for mutual comparison. CONSTITUTION:By the counted value of the channel signal CH of a cycle count er 4, the input data Dk of the channels are alternately written in RAMs 1 and 2, and the two data are simultaneously read with the same address units during the cycle following the end of writing. The data read in time division mode is latched by latch circuits 6A, 6B and inputted in parallel to a non- coincidence detecting circuit 7 and a multiplexer 8. The circuit 7 compares the m'th and m-2'th cycle input data introduced by a timing signal DET con cerning the same channel. In case of non-coincidence, a non-coincidence detection signal NEQ is outputted and the most recent input data Dk of the non-coincident channel is written in a buffer 10 together with the channel signal CH indicating the channel number.
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