发明名称 DATA TRANSFER CONTROL CIRCUIT
摘要 PURPOSE:To perform data transfer processing independently of the data transfer speed and the cable length by displaying the presence or the absence of data on one of two flag registers and displaying the data transfer stop indication and the number of data transfer response signals on the other. CONSTITUTION:Data of write data 50 is stored in a data buffer 1 indicated by an in-pointer 6, and the flag indicated by the in-pointer 6 is set to '1' in a flag register 3a. Next, a data transfer stop latch 8 is set, and the flag of a flag register 3b indicated by the in-pointer 6 is set to '1'. Write data 50 stored in the data buffer 1 is set to an output register 2 from the data buffer 1 indicated by an out-pointer 7 synchronously with a write data request signal and is written on a magnetic disc device. Next, the flag register 3b is checked, and data '00' is set to the output register 2 for the write data request signal and is written on the magnetic disc device.
申请公布号 JPS61187059(A) 申请公布日期 1986.08.20
申请号 JP19850026249 申请日期 1985.02.15
申请人 HITACHI LTD 发明人 SHIBATA YOSHIICHI
分类号 G06F13/12;G06F13/42 主分类号 G06F13/12
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