| 摘要 |
<p>A CMOS technology cell which can be formed as a resistor, a capacitor, a resistor capacitor combination or a load impedance in a gate array wherein a basic cell is replaced by a special cell which has the same geometrical dimensions as the special cell. The special cell contains a pair of transistors (Tr1 and Tr2) with channels KP, KN of the transistors which are narrow but have long lengths. The transistors are arranged laterally to the source and drain of the transistors and due to the long channel length of each transistors, the transistors can be used as a resistor having a substantial resistance value. Also, the gate capacitance can be used as a high value capacitor thus allowing the special cells to provide resistance, capacitance, RC or load impedance for the other cells.</p> |
