| 摘要 |
PURPOSE:To perform the operation in a half of the time of a conventional method of one-bit shift by repeating the step where a multiplier is shifted by two bits and is added to the preceding addition result. CONSTITUTION:A multiplier X and a multiplicand Y are stored in a multiplier register 1 and a multiplicand register 2 respectively at the initial time. In the 0th step, Z/2<2>+(X-2+X-1-2X0).Y=(X-2+X-1-2X0).Y is operated on the basis of low-order three bits X-2, X-1, and X0 of the multiplier register 1, and the result is stored in a register 5, and contents of the multiplier register 1 are shifted down by two bits to eject low-order two bits. In the 1st step, Z/2<2>+(X0+ X1-2X2)Y=[(X-2+X-1-2X0)Y.2<-2>+(X0+X1-2X2) Y.2<0>] is operated on a basis of low-order three bits X0-X2 of the multiplier register, and contents of the register 1 are shifted by two bits. This operation is repeated by n steps to obtain the addition result in positions shifted from low-order parts of the register by 2n bits. |
