| 摘要 |
PURPOSE:To decrease the converting time by using two kinds of high/low clocks to generate a pulse train in response to the weight of bit location so as to apply converting in a D/A converting circuit using the pulse density multiplication system. CONSTITUTION:A binary pulse density multiplication circuit consists of an AND gate 2, an OR gate 3 and a binary counter 5. An analog signal corresponding to an output data (DX) of a register 1 is outputted by using a pulse train fXA generated by a clock rate fA of the 1st clock generating section 7. A new input signal is written in the register 1 and a counter 6 is started and a prescribed time is formed by using a clock fB of the 2nd clock generating section 8. Then a switch 9 is switched by using a pulse train fXB to output an analog signal corresponding to a new output data DY of an output register. When the relation of fA<<fB is established, the titled circuit applies low speed operation normally and high speed operation for a prescribed time after the new input signal is written.
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