发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To form an effective checking element of a part wherein the relative accuracy of each process poses problems, by changing the width of an ion implanting region to the channel region of a transistor along the longitudinal direction of the channel. CONSTITUTION:In a checking element, which is simultaneously formed together with a memory element, an area, where a gate electrode 1 of the checking element and ion implanting regions 2a and 2b are overlapped, is changed. This is caused by relative position relationship, which is a problem of poor ion implantation region in the capacitor part of a capacitor-part counter electrode 11 of the memory element. Therefore the effective channel width is changed. By measuring a channel current, correlation with respect to the relative position relationship is obtained. Thus defects due to relative errors in a plurality of processes including alignining and etching accuracy, whose clarification has been difficult, can be checked simply. Feedback to the manufacturing processes can be quickly performed, and extensive contribution to the stability of yield rates can be accomplished.
申请公布号 JPS61184879(A) 申请公布日期 1986.08.18
申请号 JP19850024745 申请日期 1985.02.12
申请人 NEC CORP 发明人 ASAKURA YOSHITOMO
分类号 H01L27/10;H01L21/265;H01L21/66;H01L21/8242;H01L27/108;H01L29/10;H01L29/78 主分类号 H01L27/10
代理机构 代理人
主权项
地址
您可能感兴趣的专利