发明名称 TIME SWITCH CIRCUIT
摘要 PURPOSE:To attain normal exchange even when a phase difference exists between input data by using an input clock, a clock different from a frame pulse, and a frame pulse itself so as to latch the input data thereby absorbing the phase differencd of the input data. CONSTITUTION:One frame's share of input data subject to multiplex in channels #0-#3 from an input highway 1 are fetched to an input data latch 10 by using a clock C1 and a frame pulse F1 inputted at the same time via a shift register 2. The data in the latch 10 is latched again into a data latch 11 by using a clock C2 and a frame pulse F2 generated at a part near the channel. The data are subject to exchange connection by a control memory shift register 4 and an output register 5 and read to an output highway 6. Thus, the phase difference between input data due to the difference in the length of input highways is absorbed by a time switch for one frame's share, and even when the input highway length is different between the highways, the exchange operation synchronized with the clock and frame pulse are attained.
申请公布号 JPS61184086(A) 申请公布日期 1986.08.16
申请号 JP19850023291 申请日期 1985.02.08
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 SHIMAZU YOSHIHIRO;TERADA YASUKAZU
分类号 H04Q3/52;H04Q11/04 主分类号 H04Q3/52
代理机构 代理人
主权项
地址