| 摘要 |
PURPOSE:To increase the degree of freedom in standardizing RAM construction of peripheral circuits by facilitating the electrical isolation of memory cells in action from memory cells in hold, by a method wherein the emitter of the coupling transistor of a RAM cell using the conventional I<2>L is isolated from the ground terminal of the I<2>L, and a coupling transistor is replaced with a forward NPN transistor. CONSTITUTION:NPN transistors Q3, Q4 connected to each other by crossing and PNP transistors Q1, Q2 acting as loads are constructed by mutual wiring by 2 gates of I<2>Ls. Q1 plus Q4 and Q2 plus Q3 correspond to the I<2>L gate each. Q5, Q6 are normal NPN transistors, i.e. reversely acting transistors in the forwardly acting NPN transistor. Therefore, Q5, Q6 act reversely to Q3, Q4. A word line W<+> is the injector line of the I<2>L, and a constant current source is connected to this line W<+> during action. |
