| 摘要 |
PURPOSE:To prevent the diffusion of impurity atoms to a gate insulating layer by doping an impurity to a wiring layer consisting of a polycrystalline semiconductor layer, doping the impurity in order to form source-drain regions and doping the impurity to a gate composed of the polycrystalline semiconductor layer. CONSTITUTION:An SiO2 layer 2, a poly Si layer 3 and an SiO2 layer 4 are applied onto a P-type Si substrate 1 in succession, and the SiO2 layer 4 and the poly Si layer in a gate forming region are left through patterning. On the other hand, an SiO2 layer 7 as a field insulating layer and a poly Si layer 8 as a wiring layer are applied to a wiring region successively, and the poly Si layer 8 is patterned to shape a wiring. As<+> is implanted while using the SiO2 layer 4 as an impurity introduction stopping layer as a mask, and N<+> type source-drain regions 5, 6 are formed through annealing at a high temperature while As<+> is doped in high concentration to the poly Si layer 8. The SiO2 layer 4 is removed, and As<+> is implanted and doped to the poly Si layer in a gate electrode. The quantity of a dose at that time is made smaller than an implantation for shaping the source-drain regions, but As<+> is doped to the poly Si layer 3 at the irreducible minimum of a demand. Accordingly, a thin gate insulating layer having normal device characteristics is acquired. |
