发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To flatten a contact hole by combining the formation and removal of an oxide layer with the application and removal of an oxidation-resistant layer and doping two kinds of impurities to separate buried layer. CONSTITUTION:A field oxidation region 3 is formed on a boundary between a well 2 shaped to a substrate 1 and the substrate 1. An N<+> type region 6 is formed through self-alignment while using a gate 5 as a mask, and a P<+> type region 9 is shaped thorugh self-alignment while employing a gate 8 as a mask. A PSG layer 10 and an silicon nitride (Si3N4) layer 11 are applied onto the whole surface of the substrate in succession, contact holes are bored, and poly Si layers 12 are applied. The layers 12 are etched to expose the layer 11, and poly Si layers 12n and 12p are left in the contact holes. SiO2 layers 13n and 13p are formed onto the surfaces of the buried layers 12n and 12p. A P channel FET section containing the layer 13p is coated with a resist, the layer 13n is removed, and an N-type impurity is doped to the layer 12n while using the layer 13b and the layer 11 as implantation masks. The surface of the layer 12n is oxidized again to shape an SiO2 layer 13na, and a P-type impurity is doped to the layer 12p. The layer 13na in the contact hole is removed, layers 14 are applied, and wiring layers are formed, thus flattening the contact holes, then improving reliability.
申请公布号 JPS61181154(A) 申请公布日期 1986.08.13
申请号 JP19850022373 申请日期 1985.02.07
申请人 FUJITSU LTD 发明人 IMAOKA KAZUNORI;SAITO TSUTOMU
分类号 H01L21/8234;H01L21/28;H01L21/8238;H01L27/088 主分类号 H01L21/8234
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