发明名称 MANUFACTURE OF VERTICAL FIELD EFFECT TRANSISTOR
摘要 PURPOSE:To reduce gate capacitance, by ion-implanting oxygen into a portion of a polycrystalline silicon electrode to form an oxide film. CONSTITUTION:On one conductive type semiconductor substrate 1, an impurity region 2 having the other conductive type is formed. Next, a gate oxide film 3 and polycrystalline silicon 4 are grown, and an impurity region 6 having the one conductive type is formed. After a cover film 7 implanted with oxygen ions coats the entire face, windows are opened through unnecessary portions of the polycrystalline silicon 4. After oxygen ion implantation 8 is done, the implanted region is converted into an oxide film 9 by annealing. On the entire face, a CVD SiO2 film or PSG film is formed, and openings are then bored through the source region and a source electrode 10 is formed. In this way, gate capacitance of the vertical field effect transistor can thus be reduced.
申请公布号 JPS61180484(A) 申请公布日期 1986.08.13
申请号 JP19850020441 申请日期 1985.02.05
申请人 NEC CORP 发明人 YAMAMOTO MASANORI
分类号 H01L21/265;H01L21/316;H01L21/336;H01L29/423;H01L29/78 主分类号 H01L21/265
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