发明名称 DYNAMIC MOS MEMORY DEVICE
摘要 PURPOSE:To detect information having excellent balance properties and high sensitivity by using a dummy cell of the same form as a memory cell and therefore eliminating an unbalanced state between paired digit lines due to the activation of a word line. CONSTITUTION:Memory cells 10 and 11 and dummy cells 12 and 13 form 1-transistor type cells on the same surface of a substrate and in the same gyometric shape. The digit lines D and -D and sense nodes A and B are precharged by the power supply voltage VP of about a middle level compared with the power supply voltage VD with pulses phiP and phiT. When the detection of signals is started, a drive pulse phiW of a word line and a drive pulse phiDW of a dummy word line are set at high potentials. Then the transistors of a memory cell at one side and a dummy cell at the other side conduct. Thus the potentials of the digit lines and nodes A and B are changed, The dummy cells 12 and 13 have the same form and therefore the changes of both lines D and -D due to the activation of two word lines have the same phase and cancelled with each other.
申请公布号 JPS61180996(A) 申请公布日期 1986.08.13
申请号 JP19860025368 申请日期 1986.02.07
申请人 NEC CORP 发明人 WADA TOSHIO
分类号 G11C11/401;G11C11/34 主分类号 G11C11/401
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