发明名称 SYNCHRONOUS COMMUNICATION EQUIPMENT
摘要 PURPOSE:To minimize the number of required synchronous control characters SYNC for synchronization by applying error correction coding to the synchronous characters so as to attain transmission/reception immune to the deterioration in a transmission line. CONSTITUTION:A filter 1-24 waveform-shapes a demodulated signal and gives an output to a region decision circuit 1-26 via an equalizer 1-25. The region decision circuit 1-26 decides the quadrant of the inputted signal, a digit corresponding to each quadrant is obtained by a level converting circuit 1-27 through the decision of the quadrant and a (K+i)-bit expressed in a binary code is outputted in parallel. Through the demodulation above, an output corresponding to a block comprising a k-bit of information bit and an i-bit of check bit constituted by a coder of a transmitter is obtained. Further, a syndrome arithmetic circuit 1-28 of a decoder detects an error bit from the output and an error bit bit correction circuit 1-29 corrects the error and only the information bit coverted into a serial signal by a parallel/serial converter 1-30 is outputted from an output terminal 1-4.
申请公布号 JPS61179623(A) 申请公布日期 1986.08.12
申请号 JP19850019284 申请日期 1985.02.05
申请人 OKI ELECTRIC IND CO LTD 发明人 FUKAZAWA ATSUSHI;SATO TAKURO;AKIYAMA HARUHIKO;KAWABE MANABU
分类号 H03M13/00;H03M13/23 主分类号 H03M13/00
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