发明名称 |
System for detecting and recovering a transmitted signal |
摘要 |
What is disclosed is a system for recovering encoded data from a transmitted signal. A clock regenerating circuit regenerates a clock signal from the data bits encoded in the signal. The regenerated clock signal is used to synchronize an up/down with each individual data bit. When a data bit is at a logic "H", the counter counts from a predetermined value in an upward direction and when the data bit is at a logic "L", the counter counts in a downward direction from a predetermined value. The count after each bit-time is used to provide a signal representative of the logic state of that data bit. Accordingly, a reproduced data signal can be accurately obtained.
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申请公布号 |
US4606050(A) |
申请公布日期 |
1986.08.12 |
申请号 |
US19830516359 |
申请日期 |
1983.07.22 |
申请人 |
TOKYO SHIBAURA DENKI KABUSHIKI KAISHA |
发明人 |
SEKIGAWA, TATSUAKI;GOTOH, AKIO;TSUTSUMI, SYUITSU;MARUI, KUNIYOSHI;HONDA, NAOTO |
分类号 |
H03M5/04;H04L25/06;H04L25/40;H04L25/49;H04Q7/28;(IPC1-7):H03D3/18 |
主分类号 |
H03M5/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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