| 摘要 |
PURPOSE:To prevent missing of data even in case of a low speed line with high traffic by reading signals from a storing circuit provided in each low speed line utilizing idle time of the low speed circuit, and multiplexing and transmitting to a high speed line. CONSTITUTION:Serial signals 11-1N of a small-scale low speed line are inputted respectively to signal processing blocks 61-6N. A serial signal 40 shaped in waveform 70 of the signal 11, is inputted to a timing extracting circuit 71, synchronism detecting circuit 72 and a storage device 76. The circuit 71 outputs synchronizing signal detecting timing conformable to the bit rate of the signal 40 and a clock signal 42 for address counter. The circuit 72 detects a synchronizing signal SYC 48 in the signal 40 and starts 40 and starts an address counter 73, and supplies an address signal 45 to the device 76. When the signal 40 is written in the device 76 totally, an FF opens a gate 74, and operates address counters 77, 78. When a time period in which SYC 48 comes reaches, data from the device 76 are read out, and signals 11-1N are time division multiplexed by a multiplexer 79, and transmitted from a high speed circuit 31 through a transmitting circuit 80. |
