发明名称 VIDEO SCRAMBLING METHOD
摘要 PURPOSE:To provide a video scrambling method prevented from the easy decoding of the scrambling method and the deterioration of reproduced picture quality by exchanging the order of lines in a block, and in a horizontal flyback time, adding data indicating the normal position of a corresponding line to obtain a video scrambling signal. CONSTITUTION:A scramble controller 309 applies line specification data 309(1) to an address decoder 308 to address said line memory. The address decoder 308 addresses a line memory 304 successively at a timing different from that of said storage and the output data of the line memory 304 are converted into analog signal by a D/A converter 305. The output 309(2) of the scramble controller 309 is data indicating the normal position of the line, scrambled by a data scrambler 310 and superposed to the horizontal flyback time of the corresponding line by a superposing circuit 306 and the superposed signal is outputted from an output terminal 312.
申请公布号 JPS61177089(A) 申请公布日期 1986.08.08
申请号 JP19850017879 申请日期 1985.01.31
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 IGATA YUJI;MORI HITOSHI
分类号 H04K1/00;G06F21/10;H04N7/167;H04N7/169 主分类号 H04K1/00
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