发明名称 BUFFER CONTROL SYSTEM FOR INTER-PROCESSOR COMMUNICATION
摘要 PURPOSE:To avoid the conflict for acquisition and release of a buffer among processors by always keeping a buffer left when buffers are acquired. CONSTITUTION:The number of ICB301 or buffers 302 which are presently chained with a queue is not controlled by a single variable but by two variables, i.e., a release counter and an acquisition counter. In an initial mode the release counter is set equal to the number of all ICB/buffers together with the acquisition counter set at 0 respectively. Then the acquisition counter is increased every time the ICB/buffer is acquired. While the release counter is increased for each release. Thus the number of ICB/buffers which are presently chained with a queue can be obtained from the values of both counters. Then one or more units of ICB301 or buffer 302 are left when the ICB301 or the buffer 302 are acquired from the queue.
申请公布号 JPS61175757(A) 申请公布日期 1986.08.07
申请号 JP19850014222 申请日期 1985.01.30
申请人 HITACHI LTD 发明人 MATSUI SUSUMU
分类号 G06F15/16;G06F12/02;G06F13/38;G06F15/167;G06F15/177 主分类号 G06F15/16
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