发明名称 INFORMATION PROCESSING SYSTEM
摘要 PURPOSE:To execute an exact and abundant error information collection by providing a means for inputting data on a series data bus, which is transferred from a support processor, in series to a shift register, and executing an error processing by using its input data. CONSTITUTION:When a shift-in function is designated by a function line 35, a controlling circuit 56 in a gate array GA26 inputs data transferred through a series data bus 32, in series to a shift register 41. Subsequently, in the controlling circuit 56 in each GA26, a controlling circuit in the GA26 which has been selected and designated by a support processor shifts the data which has been inputted in series to the shift register 41, to a data register 52. Next, this data, namely, error processing data is supplied to each part in the channel through a terminal 53, and an error processing of its channel, namely, clearing of a register, etc. of its channel, clearing of an auxiliary storage device, etc. are executed.
申请公布号 JPS61175836(A) 申请公布日期 1986.08.07
申请号 JP19850016798 申请日期 1985.01.31
申请人 TOSHIBA CORP 发明人 IGARASHI SATORU;NAKAJIMA YUTAKA
分类号 G06F11/34;G06F11/07 主分类号 G06F11/34
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