发明名称 |
MULTIPLEXER APPARATUS HAVING NBMB CODER |
摘要 |
The multiplexer combines a plurality of input data bit streams into a single output bit stream. It comprises synchronizers (101 to 106) each of n input data bit streams to produce n synchronized bit streams; a coder (130) for converting mutually corresponding parallel n bits of said n synchronized bit streams into parallel m bits to produce m synchronized bit streams and a means (140) for multiplexing said m synchronized bit streams into a single high-speed output bit stream. This multiplexer requires neither an n bit serial-to-parallel converter nor an m bit parallel-to-serial converter. The dispensation with such converters, which would need high-speed operation, leads to less expensive and more compact hardware. |
申请公布号 |
DE3364310(D1) |
申请公布日期 |
1986.08.07 |
申请号 |
DE19833364310 |
申请日期 |
1983.03.08 |
申请人 |
NEC CORPORATION |
发明人 |
FUJIMURA, HIROSHI;KAWAI, KIYOAKI |
分类号 |
H04J3/06;H04J3/00;H04J3/07;H04L25/49;(IPC1-7):H04J3/06;H04L5/22;H03M7/00 |
主分类号 |
H04J3/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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