发明名称 MEMORY ACCESS CONTROLLING SYSTEM
摘要 PURPOSE:To continue its operation by providing a means for detecting a factor of an abnormality on an information processor having an occupied memory, and switching the occupied memory to a common memory, when an abnormality has been detected. CONSTITUTION:Prior to operation of a system, a micro-instruction of an occupied memory 8 is stored in a common memory 7, and a stored address A is made to coincide with an address A of the occupied memory 8 in advance. An information processor 10 is provided with a detecting part 10-1 for detecting a hard error of the occupied memory, and when an error is detected, the connection of the device 10 and the occupied memory 8 is switched to the connection of the device 10 and the common memory 7 by operating a switching circuit 11. Accordingly, the device 10 can continue its operation without any trouble, even if a hard error is generated in the occupied memory, its switching is executed, and the common memory 7 is used.
申请公布号 JPS61175846(A) 申请公布日期 1986.08.07
申请号 JP19850018043 申请日期 1985.01.31
申请人 FUJITSU LTD 发明人 SAKURAI MITSUO;SASO HIDEYUKI;SATO NOBUYOSHI;HITOMI MASAHIRO
分类号 G06F12/16;G06F12/00;G06F13/18;G06F15/16;G06F15/177 主分类号 G06F12/16
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