发明名称 MICROPROCESSOR SYSTEM
摘要 PURPOSE:To use as it is software which has been developed already, by adding hardware for converting automatically a word transfer command to a byte transfer command of plural times. CONSTITUTION:In case of write operation, by the first write command, an output (ADR/DAT7-0) of a microprocessor (muCPU)1 passes through a bidirec tional drive 5 and it is written on a memory I/O11 and a memory I/O which has been connected to a system bus. By the second write command, an output (ADR/DAT15-8) of the muCPU1 is written on the memory I/O11 through a bidirectional bus driver 4 and a bidirectional bus driver 9. By this operation, write data of 16 bits is divided into two times of 8 bits each and written on the memory I/O11. That is to say, the command is outputted two times, and as a result, a word transfer command is converted to a byte transfer command of 2 bytes.
申请公布号 JPS61175845(A) 申请公布日期 1986.08.07
申请号 JP19850016777 申请日期 1985.01.31
申请人 TOSHIBA CORP 发明人 TAKENAKA TSUTOMU
分类号 G06F13/36;G06F13/00;G06F13/40;G06F15/00;G11C11/419 主分类号 G06F13/36
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