发明名称 |
Memory unit having arithmetic and logic functions, in particular for graphic processing. |
摘要 |
<p>A memory circuit including memory elements (2) on which the data read, write, and store operations can be arbitrarily performed, the memory elements (2) having a dyadic/arithmetic operation function. In a read/modify/write mode to be executed during a memory cycle and in an interval in which data from the memory elements (2) and data from external devices exist, an operation is executed between the external data and the data in the memory elements (2) and the operation result is stored during a write cycle, thereby achieving a higher-speed operation.</p> |
申请公布号 |
EP0189524(A2) |
申请公布日期 |
1986.08.06 |
申请号 |
EP19850112469 |
申请日期 |
1985.10.02 |
申请人 |
HITACHI, LTD. |
发明人 |
KIMURA, KOICHI;OGURA, TOSHIHIKO;AOTSU, HIROAKI;IKEGAMI, MITSURU;KUWABARA, TADASHI |
分类号 |
G06F7/575;G06T1/20;G09G5/393 |
主分类号 |
G06F7/575 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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