发明名称 DATA TRANSMISSION SYSTEM
摘要 PURPOSE:To raise the transmission speed by performing selectively data transmission using a modulated signal and that using a data signal and a clock signal. CONSTITUTION:When a selecting signal from a selecting signal input terminal 126 is in the low level, the data signal and the clock signal from output terminals 121 and 122 of an LSI 101 for transmission are inputted to a selecting circuit 123 through a transmitting part and input terminals 124 and 125 of an LSI 11 for reception. They are inputted to a receiving circuit 114, and then, the receiving circuit 114 is operated. When the selecting signal from the selecting signal input terminal 126 is in the high level, the modulated signal from an output terminal 106 of the LSI 101 for transmission is inputted to a demodulating circuit 113 through the transmitting part and an input terminal 112 of the LSI 111 for reception. A reception data signal and a reception clock signal from the demodulating circuit 113 are selected by a selecting circuit 123 and are inputted to the receiving circuit 114, and then, the receiving circuit 114 is operated.
申请公布号 JPS61174846(A) 申请公布日期 1986.08.06
申请号 JP19850015679 申请日期 1985.01.30
申请人 HITACHI CABLE LTD 发明人 AOKI TERUAKI
分类号 H04L25/40;H04L7/04;H04L13/00;H04L29/08 主分类号 H04L25/40
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