YA semiconductor memory is provided with memory cells for storing a plurality of sets of data, each of the sets having check bits. A selecting circuit selects some of the memory cells to form a set in response to a first address signal. The circuit includes an error correcting code circuit, a tristate circuit and a control circuit which forms a control signal to control the tristate circuit. Output terminals of the tristate circuit are coupled with external output terminals of the semiconductor memory. Also, the tristate circuit is controlled by the control signal to bring the external circuit terminals into high impedance at least during the time when the error correcting code circuit is delivering indefinite data.
