| 摘要 |
PURPOSE:To dispense with dedicated buses by providing a bus connection circuit interconnecting a central processing unit, a data channel, a main memory device and individual buses of the two systems. CONSTITUTION:In a 0-system central processing unit 11, a 0-system main memory device 13 connected to 0-system individual bus 5 is used to execute the instruction. When the unit 11 starts an 1-system data channel 22, starting takes place through a o-system bus coupling cirucit 14, a bus 31, and a bus connection circuit 24. The channel 22 is started by signals indicating the start from the unit 11. In this case, the channel 22 is logically connected to the unit 11. Hence, data reading and writing is performed on the device 13. When the channel 22 performs data read adn write to the device 13, the device 13 is connected to the buses 15 and 25 and the 1-system main memory device 23 is disconnected from the buses 15 and 25. |
