发明名称 CHECKING SYSTEM OF ROM FOR SEQUENCE CONTROL
摘要 PURPOSE:To check the outline of the operation of a ROM by dividing the memory area of the ROM into two blocks and storing check data in the second block. CONSTITUTION:Control data is stored in a part I of the memory area of a ROM1 of the test object, and check data is stored in a part II. When control is requested, an address signal A from an external controller is inputted to the ROM1 through a selector 2, and a prescribed control output is sent through a gate 4. Unless control is requested, the ROM1 is checked. In this check, the address input of the ROM1 is inputted to the ROM1 through the selector 2, and corresponding output data stored in the part II is sent back and inputted to the selector 2 through a flip flop 3. SInce the time required for the completion of the series of operations is a certain value at the normal operation time, this time is monitored by a counter to discriminate whether the operation is normal or abnormal.
申请公布号 JPS61170845(A) 申请公布日期 1986.08.01
申请号 JP19850012168 申请日期 1985.01.25
申请人 FUJITSU LTD 发明人 ICHIKI TORU
分类号 G06F12/16 主分类号 G06F12/16
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