| 摘要 |
PURPOSE:To increase the withstand voltage by a method wherein a drain region is surrounded by forming the thick oxide film of a substrate surface layer, and a drift region of the same conductivity type as that of the drain region and lower concentration is formed to the oxide film on the substrate side and joined to the curved part of the drain region, so as not top generate curved surfaces at the junction plane. CONSTITUTION:A source region 5 and a drain region 7 are formed in the surface layer of a p-well 3 in an n-substrate 1, and a gate electrode 11 is formed between both via thin gate oxide film 9. A thick oxide film 13 formed in the surface layers of the substrate 1 and the p-well 3 surrounds the MOS transistor, and a parasitic n-channel stop region 15 and a parasitic p-channel stop region 17 are formed under the oxide film 13. A part 13a surrounds also the drain region 7, and a drift region 19 more decreased than the region 7 in impurity concentration is formed thereunder, joined to the curved part 7a, and connected to a channel region 21. Besides, the gate electrode 11 is overlapped over the surrounding part 13a. Such a construction can yield the lateral MOS transistor of high withstand voltage.
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