发明名称 Arrangement for accelerated turn-off of a GTO thyristor
摘要 For an arrangement with turn-off control circuit for a GTO thyristor, with separate pulse transformers for the turn-off control stage and negative bias voltage stage, the secondary windings of which are connected via decoupling diodes or rectifiers to the gate/cathode terminals of the GTO thyristor, the permissible minimum period between two successive turn-off pulses is to be shortened for accelerated turn-off and for use at higher frequencies. This is achieved by the fact that the turn-off control pulse via the pulse transformer (T2) is turned off after only T < tgw but is maintained up to its natural decay as a superposition on the negative bias voltage with freewheeling via the low-impedance secondary circuit of the pulse transformer (T3) of the turned-on negative bias voltage stage (III). Advantages: use at higher frequencies and simplification of the turn-off transformer (T2). <IMAGE>
申请公布号 DE3503323(A1) 申请公布日期 1986.07.31
申请号 DE19853503323 申请日期 1985.01.29
申请人 LICENTIA PATENT-VERWALTUNGS-GMBH 发明人 TADROS,YEHIA,DR.-ING.
分类号 H03K17/04;H03K17/732;(IPC1-7):H03K17/72;H02M1/08 主分类号 H03K17/04
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