发明名称 |
DIGITAL PHASE LOCKED LOOP UNIT |
摘要 |
A digital data separator operates to separate data pulses from clock pulses in MFM encoded signals read from a magnetic disk system. The data separator includes a digital phase lock loop system incorporating a variable length shift register which functions as a variable oscillator and a programmed logic array which controls the operation of the shift register and provides phase detection and filtering functions. The PLA filters high frequency noise components from the incoming data signals and enables the system to accurately track frequency variations in the data stream while providing high tolerance to high frequency noise. |
申请公布号 |
JPS60244124(A) |
申请公布日期 |
1985.12.04 |
申请号 |
JP19840281845 |
申请日期 |
1984.12.28 |
申请人 |
UESUTAAN DEJITARU CORP |
发明人 |
RICHIYAADO UIRIAMU HARU;DONARUDO EDOWAADO TORUSHIYU;JIEIMUZU HIYUNGU PIN WAN |
分类号 |
G11B20/10;G11B20/14;H03L7/06;H03L7/099;H04L7/033 |
主分类号 |
G11B20/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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