发明名称 SIGNAL OUTPUT CIRCUIT
摘要 PURPOSE:To suppress the adverse effect due to a transient current in driving an external load by synthesizing drive currents from plural terminal drive circuits having a different time response to same output information. CONSTITUTION:Transistors (Trs) Q13, Q14 and Q17, Q18 form respectively terminal drive circuits and outputs are connected in parallel. When a voltage on a signal line 11 changes from H to L, buffers each comprised of Q11, Q12 and Q15, Q16 output respectively an inverting signal. When the buffer of the Q11, Q12 has a higher inverting threshold value than the buffer of the Q15, Q16, the Q14 is turned on earlier than the Q18 and then the Q18 is turned on. As a result, the synthesized waveform of the drive currents flowing to the Q14, Q18 is a trapezoidal form. Then the peak value of the drive current is decreased, the time change in the current is decreased to suppress the adverse effect of the transient current.
申请公布号 JPS61167220(A) 申请公布日期 1986.07.28
申请号 JP19850007748 申请日期 1985.01.19
申请人 SANYO ELECTRIC CO LTD 发明人 HAMADA MINORU
分类号 H01L21/8234;H01L27/08;H01L27/088;H03K17/12;H03K17/16;H03K17/687;H03K17/693;H03K19/00;H03K19/0175 主分类号 H01L21/8234
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