发明名称 RELATED ARITHMETIC PROCESSOR
摘要 PURPOSE:To perform related arithmetic with exclusive hardware and to shorten the related arithmetic processing time, by adding a new identifier to the relation code with which the arithmetic conditions are satisfied. CONSTITUTION:An arithmetic part OPP of a related arithmetic processor contains the U buffers 20U and 20L which store the 1st and 2nd relations, the output registers 24U and 24L which store the read data on said U buffers and a comparator 23. An MOP register 39 of a main control part 38 in a control part CNTP designates a merge operation. While the data on the merge operation is set to a command register 41 connected to a CPU. The outputs of the registers 24U and 24L are applied to a URB buffer 30U and an LRB buffer 30L of an output selection part OSP as the data equivalent to a record respectively. Then a new identifier is added to the relation code with which the arithmetic conditions are satisfied. Thus the related arithmetic is carried out by the hardware at a high speed and in a short processing time.
申请公布号 JPS61166626(A) 申请公布日期 1986.07.28
申请号 JP19850005871 申请日期 1985.01.18
申请人 AGENCY OF IND SCIENCE & TECHNOL 发明人 ITATSU IKUYA;MATSUDA SUSUMU
分类号 G06F12/00;G06F17/30 主分类号 G06F12/00
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