发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To improve the degree of integration and a function by forming at least one of source and drain regions in offset structure and shaping a thick silicon nitride film to the supper section of an N<-> diffusion layer. CONSTITUTION:N<-> diffusion layers 6 and N<+> diffusion layers 7 are shaped to a P-type silicon substrate 1, and used as source or drain regions. An silicon oxide film 2 in 20Angstrom thickness is formed, and an silicon nitride film 4 in approximately 900Angstrom thickness is shaped through a chemical vapor phase growth method, and changed into an silicon nitride film 3 in approximately 300Angstrom thickness through normal photoetching. A polysilicon electrode 5 is applied in approximately 5,000Angstrom , thus preparing a high withstanding-voltage structure MNOS type semiconductor memory device. An electric field concentrated only to a gate end section in conventional devices can be dispersed to two positions of a boundary between the N<-> diffusion layer 6 and the N<+> diffusion layer 7 and a boundary between the N<-> diffusion layer 6 and a channel, thus largely increasing drain withstanding voltage to 30V or higher.
申请公布号 JPS61166077(A) 申请公布日期 1986.07.26
申请号 JP19850006465 申请日期 1985.01.17
申请人 MATSUSHITA ELECTRONICS CORP 发明人 MURAKAMI ISAO;SATO KAZUO
分类号 H01L21/8247;H01L29/788;H01L29/792 主分类号 H01L21/8247
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