发明名称 SEMICONDUCTOR NONVOLATILE MEMORY
摘要 PURPOSE:To shorten the writing check time by providing plural information writing circuits to a memory cell and also a writing circuit which can write plural data of several bytes at a time on an EPROM respectively. CONSTITUTION:When the writing operations are carried out at a time to (n) pieces of memory cells set on a word line Wn, the line Wn is set at a high level of voltage by an X decoder 1. Then Y gates Q1-Qm are all turned on together with a Y gate Q0 also turned on. The bit lines B1-Bm are all set at high levels of voltage by the writing circuits 1 and 2. Thus the gates and drains of memory cell transistors Mn, 1, ..., Mn, m set on the line Wn are all set at high levels of voltage. Then these (n) pieces of memory all transistors all receive the writing operations. The large current capacity is required for a writing circuit when the writing opeations are given to many memory cells at a time. In this respect another writing circuit 3 is added for writing operations with plural memory cells. Thus the current capacity of the circuit 2 is supplied and the level reduction of a data line can be avoided with supply of a channel current.
申请公布号 JPS61165898(A) 申请公布日期 1986.07.26
申请号 JP19850006473 申请日期 1985.01.17
申请人 MATSUSHITA ELECTRONICS CORP 发明人 HATAKEYAMA SHINICHI
分类号 G11C17/00;G11C29/00;G11C29/34 主分类号 G11C17/00
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