| 摘要 |
PURPOSE:To eliminate the need for high speed operation of an ROM by arranging plural sets of filter blocks each comprising a binary counter, an ROM and a D/A converter in parallel and adopting the circuit constitution that the phase of a clock driving the filter block is shifted by a prescribed amount. CONSTITUTION:Plural filter blocks (10-12) each comprising a binary counter, an ROM and a D/A converter are prepared, clocks CL1-CL3 driving each binary counter in each filter block have different phase respectively, outputs are synthesized by an adder 30 to attain a filter output 7. Each block is processed in parallel and operated in a higher clock rate equivalently. Thus, no high speed operation is demmanded to the ROM and the high speed operation as a filter is attained stably.
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