| 摘要 |
PURPOSE:To improve the operation efficiency of a CPU by limiting an inhibition of executing an instruction, and an inhibition of an interruption, to only an actually necessary range, when changing a mask with respect to an input/output interruption. CONSTITUTION:A mask release detecting part 22 detects whether that which is changed to '1' from '0' exists or not in a mask, and executes a counting operation by setting a counter 24, if any. During this time, an interlock generating part 25 discriminates a kind of the next instruction 26, and if it is a mask changing instruction, it is delayed and prevented from being changed to '0' from '1'. A mask set detecting part 23 detects whether that which is changed to '0' from '1' exists or not in the mask, operates a counter 28, if any, turns on an interruption inhibiting signal 29, and as for an interrupting signal of an interruption receiving register 31, is input to an interruption processing part 33 is inhibited by a gate 32.
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