摘要 |
PURPOSE:To realize inexpensively an A-D converter with high accuracy whose linearity is compensated by sampling a ramp signal with a prescribed slope in place of an input analog signal led to a sanple-and-hold circuit at prescribed time intervals so as to compensate discontinuity at the switching of the 1st and 2nd DACs. CONSTITUTION:An input analog signal Ex is fed to a sample and hold circuit via switches S1, S2 and an output of a ramp voltage generator 10 is fed to the circuit 12 via switches S4d3 and S2. The output of the sample and hold circuit 12 is led respectively to the 1st input terminal of a comparator circuit 14 and the 1st and 2nd DACs 16, 18. The 2nd input terminal of the comparator circuit 14 is connected to common and its output terminal is connected to sequential comparison registers 17, 19. The contents of the registers 17, 19 drive the DACs 16, 18 and are extracted as a digital output signal.
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