发明名称 FREQUENCY SYNTHESIZING SYSTEM
摘要 PURPOSE:To obtain a stable and optional output frequency by providing a variable frequency divider and a variable multiplier between a reference frequency oscillator of a synthesizer and a phase comparator, making a reference frequency variable optionally, and also bringing it to an interlock control with the variable frequency divider. CONSTITUTION:A reference frequency signal which has been obtained by frequency-dividing an output of a reference frequency oscillator 3 by a 1/0 variable frequency divider 7, and thereafter, multiplying it by N by a variable N multiplier 8, and a signal which has been obtained by frequency-dividing an output of a voltage control oscillator are brought to a phase comparison, by which an error signal is obtained, and the signal concerned is filtered and fed back to the oscillator 1, and also the frequency dividing number and the multiplying number of the frequency divider 7, the multiplier 8 and a frequency divider 2 are brought to an interlock control by a frequency division and multiplication controlling circuit 9. In this way, an output of an optional frequency can be oscillated without lowering the loop gain.
申请公布号 JPS61163719(A) 申请公布日期 1986.07.24
申请号 JP19850003339 申请日期 1985.01.14
申请人 HITACHI DENSHI LTD 发明人 SATO MASAHIRO
分类号 H03L7/197;H03L7/18 主分类号 H03L7/197
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