发明名称 ARITHMETIC PROCESSING SYSTEM FOR SPARSE MATRIX
摘要 PURPOSE:To perform fast, efficient processing by detecting all non-zero element positions appearing in the arithmetic process of a sparse matrix and generating a bit map by preprocessing, and calculating only matrix element positions that the bit map indicates. CONSTITUTION:A main processing part 1 supplies matrix data to the preprocessing block of a matrix arithmetic part 2 with respect to a sparse matrix requested to be processed. The block 3 detects a fill-in position where a zero element value in the matrix changes into a non-zero element value. A non-zero element position storage block 4 makes a flag display of positions of non-zero elements and fill-in elements of the matrix supplied in bit map format. A matrix repetitive solving block 5 performs arithmetic with respect to positions where a bit flag is 1 according to the input elements and the bit map of the block 4. The arithmetic result is sent from the block 5 to the main processing part 1, which decides the arithmetic result, and updates and supplies the element values to the block in case of deficiency to repeat the matrix arithmetic. When the decision result is sufficient, the result is outputted.
申请公布号 JPS60247782(A) 申请公布日期 1985.12.07
申请号 JP19840103983 申请日期 1984.05.23
申请人 FUJITSU KK 发明人 KAGE TETSUO;OOISHI YUUKO
分类号 G06F17/12;G06F17/16;(IPC1-7):G06F15/347 主分类号 G06F17/12
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