| 摘要 |
PURPOSE:To make it possible to correct characteristic change after chips are cut out and to enhance a yield rate, by providing a region, where the first trimming is performed under the wafer state, and providing a region, where the second trimming is performed under the package state. CONSTITUTION:As the resistance patterns of chips, a fixed pattern region RF, a first trimming region RT1 and second trimming regions RT21-RT23 are provided in series. At first, under the wafer state, the resistance value of the series circuit of the region RF, the region RT1, the regions RT21-RT23 is measured. The region RT1 is trimmed so that the value lies in a tolerance range. Then chips are cut out of the wafer and packages are formed. Under the package state, the regions RT21-RT23 are trimmed. Voltages in the reverse directions are applied to necessary terminals P1-P4, and Zener diodes ZD1-ZD3 are shorted. Thus the trimming is carried out.
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