摘要 |
PURPOSE:To obtain an excellent histeresis characteristic by providing a series circuit comprising a switch and a D-FET between an output terminal of a D-FET load inverter and a common and using an inverted output signal of the said inverter so as to turn on/off the said switch. CONSTITUTION:An output terminal N1 of an inverter I1 is connected to an input gate of an inverter I2 of the 2nd stage and connected to a series circuit comprising transistors (TRs) Q3, Q4. The series circuit is turned on/off by a signal at an output terminal N2 of the inverter I2. When the level of the output terminal N2 is logical L, the TRQ3 is turned off. When the level of an input terminal A goes to logical H, the output terminal N1 goes to logical L, a TRQ6 is turned off and the output terminal N2 goes to logical H. As a result, the TRQ3 is turned on and a TRQ4 attains connection to common. As a result, a histeresis characteristic is provided. The TRQ4 acts like adjusting the gm ratio of the inverter I1 against the characteristic fluctuation of the TRQ1.
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